Verification

Our team brings a great value through their experience and in-depth knowledge of various verification technologies, who has many successes to their credit. Due to our expertise to handle small to large projects we can take-up responsibility of complete verification environment development, testcase definition and fast coverage closure. We have developed certain tool agnostic techniques for fast coverage convergence through redundancy removal of various test scenarios. Our automation expertise provides an added advantage to our customers who wish to automate their verification processes

Capabilities

Full Chip verification
IP/Block level verification
Complete Verification Environment development
Testcase definition
Coverage  Analysis and closure
Design debug

Methodologies

UVM, OVM, VMM

Languages

SystemVerilog, Verilog, VHDL, C, System C

Tools

All Industry standard tools from Cadence, Mentor and Sysnopsys

Techniques

C based SoC Verification
SystemC based system modeling
Assertion based verification
Constraint driven random verification
Fast Coverage closure through redundancy removal

Domains

Memories - DDR2/3, Telecom - PDH/Sonet/SDH, Networking - L2/L3 metro ethernet switch, High speed Video Interconnects - HDMI,MHL,DisplayPort, Slow interfaces - I2C, SPI etc.,Processor Bus -  AXI4